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Viewing: ECE 463 / ECE 563 : Microprocessor Architecture

Last approved: Wed, 07 Mar 2018 14:56:29 GMT

Last edit: Wed, 07 Mar 2018 14:56:22 GMT

Change Type
Major
ECE (Electrical and Computer Engineering)
463
006059
Dual-Level Course
Yes
563
Cross-listed Course
No
Microprocessor Architecture
Microarch
College of Engineering
Electrical & Computer Engineering (14ECE)
Term Offering
Fall and Spring
Offered Every Year
Spring 2016
Previously taught as Special Topics?
No
 
Course Delivery
Face-to-Face (On Campus)

Grading Method
Graded with S/U option
3
16
Contact Hours
(Per Week)
Component TypeContact Hours
Lecture3.0
Course Attribute(s)


If your course includes any of the following competencies, check all that apply.
University Competencies

Course Is Repeatable for Credit
No
 
 
Eric Rotenberg
Professor
full

Open when course_delivery = campus OR course_delivery = blended OR course_delivery = flip
Enrollment ComponentPer SemesterPer SectionMultiple Sections?Comments
Lecture1100NoCombined 463/563 section..
Open when course_delivery = distance OR course_delivery = online OR course_delivery = remote
Prerequisite: ECE 209 and ECE 212
Prerequisite: Graduate standing
Is the course required or an elective for a Curriculum?
Yes
SIS Program CodeProgram TitleRequired or Elective?
14CPEBSComputer EngineeringElective
14EEBSElectrical EngineeringElective
Architecture of microprocessors. Measuring performance. Instruction-set architectures. Memory hierarchies, including caches, prefetching, program transformations for optimizing caches, and virtual memory. Processor architecture, including pipelining, hazards, branch prediction, static and dynamic scheduling, instruction-level parallelism, superscalar, and VLIW. Major projects.

1. Title and Abbreviated title change.


The new title better conveys the course's content.  Microprocessor architecture is a term with a narrower and more specific meaning, pertaining directly to the design of the logic and overall organization of microprocessors.  The older title is broader and possibly misleading to students and other stake holders.


The new abbreviation better matches the new title.


2. Prerequisites: 


The proposed change is to add ECE 209 and 212 as the prerequisite. ECE 209 covers programming with data structures and the C programming language. Substantial prior programming experience is required for this course because students implement simulators of computer architecture components. While ECE 209 is already required for both CPE and EE students, currently, there is nothing preventing students from taking ECE 463 before ECE 209.  Making ECE 209 a prerequisite of ECE 463 enforces the correct course sequence.


ECE 212 is required for the basics of digital systems design.  ECE 310 (formerly 406 and listed as a prerequisite) could be selected instead of 212, but the more advanced material covered in 310 is not strictly required for the material in this course.


3. Catalog description: 


The current catalog description is outdated. For example, ECE 463 is primarily concerned about uniprocessor design and not multiprocessor design, so reference to the latter has been removed. On the other hand, the enumeration of processor topics has been made more descriptive and comprehensive. 


4. Content: 


Processor technology evolves rapidly and semiconductor technology trends cause emphasis to shift from one performance metric to another (for example, power consumption, cycle time, etc.). Faculty in charge of ECE 463 continuously update the content of the course accordingly. Note that the fundamental content has not changed.


Rather, certain outdated aspects receive less emphasis, certain other aspects receive more emphasis (e.g., virtual memory, critical paths and cycle time impact, etc.), and new aspects are introduced (e.g., modeling energy consumption in projects). 


5. Student learning outcomes: 


Student learning outcomes are described more comprehensively and in more depth. This is a result of continuous assessment consistent with ABET goals.


6. Dual Level Listing


463 and 521 are currently co-taught as a dual listed course sequence.  Under new rules,  the dual listed course must be numbered 563.  So, we will add that as a new course and later drop 521.


The difference in requirements between 463 and 563 are enumerated in the Student Evaluation Methods.  There are two main differences: (1) projects for 463 have substantially reduced scope compared to 563, and (2) the midterm and final exam have additional questions for 563 students that demand greater or deeper mastery of the material.


No

Is this a GEP Course?
No
GEP Categories

Humanities Open when gep_category = HUM
Each course in the Humanities category of the General Education Program will provide instruction and guidance that help students to:
 
 

 
 

 
 

 
 

 
 

 
 

Mathematical Sciences Open when gep_category = MATH
Each course in the Mathematial Sciences category of the General Education Program will provide instruction and guidance that help students to:
 
 

 
 

 
 

 
 

Natural Sciences Open when gep_category = NATSCI
Each course in the Natural Sciences category of the General Education Program will provide instruction and guidance that help students to:
 
 

 
 

 
 

 
 

Social Sciences Open when gep_category = SOCSCI
Each course in the Social Sciences category of the General Education Program will provide instruction and guidance that help students to:
 
 

 
 

 
 

 
 

 
 

 
 

Interdisciplinary Perspectives Open when gep_category = INTERDISC
Each course in the Interdisciplinary Perspectives category of the General Education Program will provide instruction and guidance that help students to:
 
 

 
 

 
 

 
 

 
 

 
 

 
 

 
 

Visual & Performing Arts Open when gep_category = VPA
Each course in the Visual and Performing Arts category of the General Education Program will provide instruction and guidance that help students to:
 
 

 
 

 
 

 
 

 
 

 
 

Health and Exercise Studies Open when gep_category = HES
Each course in the Health and Exercise Studies category of the General Education Program will provide instruction and guidance that help students to:
 
 

 
 

 
 

 
 

 
&
 

 
 

 
 

 
 

Global Knowledge Open when gep_category = GLOBAL
Each course in the Global Knowledge category of the General Education Program will provide instruction and guidance that help students to achieve objective #1 plus at least one of objectives 2, 3, and 4:
 
 

 
 

 
Please complete at least 1 of the following student objectives.
 

 
 

 
 

 
 

 
 

 
 

US Diversity Open when gep_category = USDIV
Each course in the US Diversity category of the General Education Program will provide instruction and guidance that help students to achieve at least 2 of the following objectives:
Please complete at least 2 of the following student objectives.
 
 

 
 

 
 

 
 

 
 

 
 

 
 

 
 

Requisites and Scheduling
 
a. If seats are restricted, describe the restrictions being applied.
 

 
b. Is this restriction listed in the course catalog description for the course?
 

 
List all course pre-requisites, co-requisites, and restrictive statements (ex: Jr standing; Chemistry majors only). If none, state none.
 

 
List any discipline specific background or skills that a student is expected to have prior to taking this course. If none, state none. (ex: ability to analyze historical text; prepare a lesson plan)
 

Additional Information
Complete the following 3 questions or attach a syllabus that includes this information. If a 400-level or dual level course, a syllabus is required.
 
Title and author of any required text or publications.
 

 
Major topics to be covered and required readings including laboratory and studio topics.
 

 
List any required field trips, out of class activities, and/or guest speakers.
 

No additional resources are needed.

This course covers the architecture of high-performance processors and memory systems. Students undertake three major architecture simulation projects.


Student Learning Outcomes

1. Describe techniques for quantifying or measuring the performance of a microprocessor (CPU) when running a workload.


2. Define Instruction-Set Architecture (ISA) and what it specifies. This includes explaining its importance, distinguishing between software, ISA, and hardware, describing important historical trends, and designing ISA features.


3. Describe the rationale and structure of high performance cache memory hierarchies, and explain the role of temporal and spatial locality of data in their design.


4. Explain the importance of Virtual Memory, and describe the architectural mechanisms that support it.


5.  Explain how a pipelined processor executes instructions; analyze and identify common pipeline hazards; and, describe techniques for mitigating them.   


6.  Explain the meaning of superscalar processing and describe multiple architectural approaches for supporting it; also, characterize the performance differences and the logic complexity of superscalar processing compared with scalar processing. 


7.  Apply knowledge from prior objectives to simulate microprocessors and their components both manually and by constructing software programs that perform the simulation.  


8. Design microarchitectural components, and use simulation to measure performance and evaluate alternative microarchitectural designs.


Evaluation MethodWeighting/Points for EachDetails
Homework10%There will be approximately 4 to 6 homeworks throughout the semester, covering major topics: measuring performance, caches and memory hierachies, ISAs and pipelining, and instruction-level parallelism.
Project15%Project 1. Typically, the first project involves (1) constructing a cache and memory hierarchy simulator with various optimizations and flexible parameters, and (2) extensive design space exploration of the optimal memory hierarchy for each benchmark program, in terms of various performance, cost, and power metrics.

ECE 563 students are required to implement and evaluate more design features. The project for 563 students is more challenging and of significantly greater scope.
Project10%Project 2. Typically, the second project involves (1) constructing a dynamic branch predictor simulator with various optimizations and flexible parameters, and (2) extensive design space exploration of the optimal dynamic branch predictor for each benchmark program in terms of various performance, cost, and power metrics.

ECE 563 students are required to implement and evaluate more design features. The project for 563 students is more challenging and of significantly greater scope.
Project15%Typically, the third project involves (1) constructing a Tomasulo-style pipeline simulator with various optimizations and flexible microarchitectural parameters, and (2) extensive characterization of performance as a function of key microarchitectural parameters.

ECE 563 students are required to implement and evaluate more design features. The project for 563 students is more challenging and of significantly greater scope.
Midterm25%The midterm exam covers the first half of the semester which typically includes the following major units: measuring performance, caches and memory hierarchies, and instruction-set architectures.

ECE 563 students are given additional questions that evaluate mastery of material at a deeper level.
Final Exam25%The final exam may be comprehensive or may cover only the second half of the semester, at the discretion of the instructor. The second half of the semester typically includes the following major units: pipelining and instruction-level parallelism.

ECE 563 students are given additional questions that evaluate mastery of material at a deeper level.
The syllabus includes a detailed schedule so it is not replicated above.

mlnosbis 10/19/2016: No overlapping courses. MAE 534 mentions microprocessor architecture as a topic, but College of Engineering has fully approved this course, indicating no overlapping content.

ghodge 10/20/2016 ready for ABGS reviewers

ABGS Reviewer Comments:
-None
svhoward (Thu, 21 Apr 2016 12:10:08 GMT): svhoward: updated to "not repeatable for credit" with instructor permission
aeherget (Tue, 16 Aug 2016 18:12:27 GMT): AECHH: Confirmed prerequisites by Dr. David Parish 8/15/2016 via email.
aeherget (Mon, 22 Aug 2016 18:01:14 GMT): aeherget: Forwarded to UCCC meeting. Syllabus requires update for codable pre-requisites.
lamarcus (Mon, 22 Aug 2016 21:08:23 GMT): Rollback: LAMARCUS: Rolled back for correct Mtg August 24th
aeherget (Fri, 09 Sep 2016 18:06:25 GMT): Rollback: AECHH: Syllabus needs to be updated. Prerequisites in syllabus need to match CIM. Student Learning Outcomes in syllabus need to match CIM. Disabilities Statement in syllabus must match the statement from https://policies.ncsu.edu/regulation/reg-02-20-07 9/9/2016
aeherget (Mon, 17 Oct 2016 14:15:38 GMT): AECHH: Uploading updated syllabus. 10/17/2016
Key: 1756